Research and Development Group for FPGA Embedded Systems

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About Research and Development Group for FPGA Embedded Systems

The "Research and Development Group for FPGA Embedded Systems Applications" is a research team focused on designing and developing embedded digital systems using FPGA (Field-Programmable Gate Array) technology. The group aims to explore innovative applications in embedded systems, with an emphasis on improving performance, efficiency, and energy optimization in fields such as electronics, communications, and industrial automation. The team integrates academic research with practical applications to provide advanced solutions that meet industry needs.

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Voice Activity Detector of Wake-Up-Word Speech Recognition System Design on FPGA

Front-end of Wake-Up-Word Speech Recognition System Design on FPGA

Wake-Up-Word Feature Extraction on FPGA

Reduced Instruction Set Computer Design on FPGA

University of Tripoli's Real Time Density- Based Traffic Light Controller on FPGA

An Alternative Microprocessor Bus Structure Design on FPGA

Design and Comparative Analysis of An Alternative Approach of Bus-Interconnect for Systems on Programmable Chip

Design_and_Implementation_of_Single_Precision Floating Point Arithmetic Logic Unit for RISC Processor on FPGA

Design_and_Implementation_of_Five_Stages_Piplined_RISC_Processor_on_FPGA

Design_and_Implementation_of_a_Smart_Traffic_Light_System_with_Libyan_License_Plate_Recognition_on_FPGA

Design and Implementation of a Smart Traffic Light System with Libyan License Plate Recognition on FPGA_Journal

Design and Implementation of a Smart Traffic Light System with Libyan License Plate Recognition on FPGA Conference

Design and Implementation of a Smart Traffic Light System with Libyan License Plate Recognition on FPGA_Conference

AN INTELLIGENT DENSITY-BASED TRAFFIC SYSTEM WITH LIBYAN VEHICLES LICENSE PLATE RECOGNITION ON FPGA

DEVELOPMENT AND COMPARATIVE EVALUATION OF INNOVATIVE BUS-INTERCONNECT METHODOLOGY FOR PROGRAMMABLE CHIP-BASED SYSTEMS

Design and Comparative Analysis of An Alternative Approach of Bus-Interconnect for Systems on Programmable Chip

Design and Implementation of Five Stages Piplined RISC Processor on FPGA

Design and Implementation of Single Precision Floating Point Arithmetic Logic Unit for RISC Processor on FPGA

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Five Stages Pipelined RISC

Traffic Light System Libyan License Plate

Microprocessor Bus Structure

ROTARY CAR PARKING SYSTEM

Single Precision Floating-point

CNN for Character Recognition

High-Speed Custom Instruction

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Curriculum Vitae

Ph.D Dissertation

Smart Parking System Based on Machine Learning

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Workshop1

CV!

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Optimized CNN for Character Recognition on FPGA-based NIOS II Embedded Processor.

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Research &Consultation Center University of Tripoli