Voltage Reference Circuits Comparisons in 65nm CMOS Process

Date

2022-3

Type

Conference paper

Conference title

The International Libyan Conference for Information and Communications Technologies (ILCICT 2022)

Issue

Vol. 0 No. 2

Author(s)

Sami Saddek Bizzan

Pages

12 - 17

Abstract

Many voltage reference circuits found in the literature claim superior performance over their peers despite the fact that each result is obtained with the use of different process parameters. This paper attempts to provide some means of comparing these circuits in the same process node. Selected CMOS voltage reference circuits are re-designed (re-sized only) and simulated with the same process parameters namely, 65nm PTM process. Design I gave the best overall results (temperature variation = 3.42ppm/cº and PSRR = -131dB) while design V operated with the lowest supply voltage (0.3V).