Abstract
This paper is presenting a discrete-event simulator written in C++ for modeling and simulating Fat tree network-on-chip systems based on MPLS technique. The simulator contains main component that construct butterfly Fat tree structure and other components that generate suitable number of switches and IP nodes (cores). The designed switch consists of input ports, output ports, input/output link controller, multi-buffers, crossbar switch, routing and arbitration components and MPLS unit. The correctness and the efficiency of the MPLS based Fat network-on-chip system is measured against well-known wormhole+ virtual channels technique. The produced results are clearly demonstrated the efficiency of the MPLS technique for future NoC designs. arabic 45 English 189